goodbye Intel

 I was a raw design module when I joined Intel and especially this group. Included in the team with many other modules, elaborated and made part of the larger soc. I made many new friendly connections, interfaced well with all of you and enjoyed being part of the design. I got optimized for better performance and as a person though increased in area a bit 😊 . There were glitches, defects, disconnects, hot spots, bugs and DRC violations but glad we fixed all and lec passes with basic functionality in tact. Together we achieved max as a team in the best and worst of timing corners and times. There were, at times, congestion and setup and hold violations but you all helped to see through them. We were a sea of logic gates but well placed and routed through the storms and peace. Its now sign-off time and am taping out coming Friday. I may be getting uniquified and instantiated afresh in another soc but part of me is pretty much part of this soc too. I may be out of this die but we are all anyway connected at system level as chiplets. I may not be accessible as L1 or L2 cache but am around and so are many memories accessible as system memory. Next weekend am going to a fresh design, new connections but am just at an arm’s length for all of you. Some of you had fun with my posts and many of you may be relieved 😊. Best wishes to each and everyone of you and lets keep in touch 😊

Comments

  1. Kumar NandanMay 17, 2023 at 9:23 PM

    I will always cherish all those moments we spent together during our ~5 years of VLSI journey, all those laughter we shared, all those stories we told. Farewell, my friend "Satya Sir" and good friends never say goodbye, they simply say “See you soon"

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